Thin film transistors are widely used in electronic circuits, in particular, as pixel transistors in active-matrix-driven flat displays. In recent years, use of organic materials for such low-profile semiconductor devices has been receiving attention. In thin film transistors using organic materials for semiconductor layers, i.e., organic thin film transistors (OTFTs), it is possible to form semiconductor layers at a reduced temperature compared to structures in which inorganic materials are used for semiconductor layers. Therefore, organic thin film transistors are advantageous in terms of the increase in area thereof, and can be formed on non-heat-resistant, flexible substrates, such as plastic substrates. An increase in the range of functions and a reduction in cost are also expected.
FIG. 14 shows an example of a configuration of an organic thin film transistor. In the organic thin film transistor shown in this drawing, a gate-insulating film 103 is disposed in such a state as to cover a gate electrode 102 on a substrate 101. On the gate-insulating film 103, a source 104s and a drain 104d are formed at positions corresponding to the two sides of the gate electrode 102, and an organic semiconductor layer 105 constituting a channel portion is further disposed on a portion stacked on the gate electrode 104 between the source 104s and the drain 104d. The organic semiconductor layer 105 is covered with a protective film 106 composed of a water-soluble resin (e.g., polyvinyl alcohol resin), a fluorine-based resin, or the like which causes low damage to an organic semiconductor material (regarding the above, for example, refer to Document 1 (C. D. Sheraw et al., “Applied Physics Letters”, 2002, VOLUME 80, NUMBER 6, pp. 1088-1090)).
Meanwhile, the water-soluble resin or the fluorine-based resin constituting the protective film 106 causes low damage to an organic semiconductor material, but has low adhesion to the other layers. Consequently, delamination easily occurs at the interface between the protective film 106 and the source 104s/drain 104d or the gate-insulating film 103 which is an underlying layer, or wiring detachment occurs when wiring is directly disposed on the protective film 106, thus reducing mechanical reliability, which makes it impossible to obtain sufficient yield.
Under these circumstances, a configuration has been proposed, in which, as shown in FIG. 15, the area of the protective film 106 is decreased by patterning the protective film 106 so as to have the same pattern as the organic semiconductor layer 105, thus minimizing the size of the interface between the protective film 106 and the source 104s/drain 104d or the gate-insulating film 103 which is an underlying layer, so that delamination between the protective film 106 and layers in contact therewith can be prevented.